DesignCon Announces 2017 Educational Program with Boot Camps, Tutorials & Complimentary Chiphead Theater Sessions Specific to Latest Engineering Trends & Topics
DesignCon 2017 returns to the Santa Clara Convention Center in Santa Clara, CA, January 31 - February 2
Dec 15, 2016
SAN FRANCISCO, Dec. 15, 2016 /PRNewswire/ -- DesignCon, the premier conference for chip, board, and systems design engineers, today announces an array of educational opportunities for its 2017 event. This year's conference will offer a range of programming dedicated to the education and advancement of today's engineers. Attendees will be given the the opportunity to explore boot camps, and gain insight through intricate tutorials on today's hottest trends via complimentary sessions on the event Expo Floor.
For more information and to register for DesignCon 2017, please visit: http://designcon.com/santaclara/passes-pricing
Boot Camps – Tuesday, January 31:
Pragmatic Signal Integrity and PCB Fabrication and Materials are essential concepts within the engineering space, for those still learning their way around them DesignCon has assembled two dedicated boot camps led by some of the brightest minds in the industry. Each all-day boot camp will offer content for those looking to refine their knowledge or get up to speed quickly.
To learn more about Boot Camps, please visit: http://designcon.com/santaclara/conference/bootcamps
Tutorials – Tuesday, January 31: Available with all All Access passes
These three-hour tutorials span various subjects integral to many facets of the engineering space. Attendees will have the opportunity to learn, practice, and refine skills in the presence of a robust list of professionals who have mastered these abilities and are equipped to share their extensive knowledge.
- Designing to Evolving 4G & Pre-5G Requirements
- Introduction to Electromagnetic Compatibility Made Simple – PCB Design
- PAM4 Signaling for 56G Serial Link Applications
- The Secret Life of Connectors: From SI and Mechanical Co-Design to Lab Verification to Mass Production
- 32 to 56 GBPS Serial Link Analysis and Optimization Methods for Pathological Channels
- AMI Model Development from Serdes Design – a Practical Approach
- Design and Verification for High-Speed I/OS at 10 to 112 GBPS with Jitter, Signal Integrity, and Power Optimization
- Measurement Based VRM Modeling
Learn more about Tutorials here: http://schedule.designcon.com/format/3-hour-tutorial
Free Educational Opportunities:
In addition to the main program, this year's event will offer a long list of free educational opportunities to all DesignCon attendees looking to enhance their onsite experience and gain insight through various sources.
Keynotes: This year's keynote program will offer exciting and insightful presentations covering signal integrity and electromagnetic field simulation, machine learning and Internet of Things (IoT) presented by top leaders from Microsoft, Ansoft Inc. & NSF Center for Advanced Electronics through Machine Learning (CAEML).
Sponsored sessions: These 40-minute sessions will provide attendees with additional education beyond regular event programming to deliver the latest on everything from signal and power integrity, to analytics, probing techniques and more.
Panels: Participants will hear from a wide range of well-respected professionals as they dive into discussions pertaining to some of the most pressing topics in the industry today. Each 75-minute discussion will offer unique insight into how today's leading minds currently view the engineering landscape.
Chiphead Theater presentations: These complimentary presentations will take place on the Expo Floor and showcase educational sessions, two product teardowns, an Expo tour, a panel discussion, and the always-popular tech trivia. The Chiphead Theater will also serve as the location of the passport program prize announcements.
View the full Chiphead Theater schedule here: http://schedule.designcon.com/format/45-minute-chiphead-theater
DesignCon will also be holding a Cartoon Caption Contest for attendees to show off their witty wisdom and give them a chance to win it all. To learn more details and to submit, visit: http://designcon.com/caption-cartoon-contest
"We're incredibly proud of the combination of educational sessions, training and fun being offered at DesignCon this year," said Naomi Price, DesignCon Conference Content Director. "We welcome a large, diverse audience to our event each year and have compiled an agenda suited to a wide range of individuals to ensure there is something for everyone to learn from and enjoy. Attendees will be given the opportunity to dive into a content-rich event made by engineers for engineers."
Apply for a Media Pass here: designcon.tech.ubm.com/2017/registrations/Media
DesignCon is the world's premier conference for chip, board, and systems design engineers in the high-speed communications and semiconductor communities. DesignCon, created by engineers for engineers, takes place annually in Silicon Valley and remains the largest gathering of chip, board, and systems designers in the country. This three-day technical conference and expo combines technical paper sessions, tutorials, industry panels, product demos and exhibits from the industry's leading experts and solutions providers. More information is available at: designcon.com. DesignCon is organized by UBM Americas, a part of UBM plc (UBM.L), an Events First marketing and communications services business. For more information, visit ubmamericas.com.